Parallel program and asynchronous circuit design
| dc.contributor.author | Ebergen, Jo C. | |
| dc.contributor.author | Segers, John | |
| dc.contributor.author | Benko, Igor | |
| dc.date.accessioned | 2026-09-04T19:37:01Z | |
| dc.date.issued | 1994-03-30 | |
| dc.description.abstract | Asynchronous circuit design is a beautiful application area for any formalism that can reason about parallelism. By means of two small, but challenging, exercises we illustrate the similarities and differences between parallel program and asynchronous circuit design. The exercises are simple to state and have many solutions, which are sometimes surprisingly efficient. They all illustrate many aspects of asynchronous circuit design. For each exercise we present several solutions, which are analyzed with respect to delay assumptions, safety, progress, and performance issues. We also mention some open problems. | |
| dc.identifier.uri | https://hdl.handle.net/10012/24263 | |
| dc.language.iso | en | |
| dc.publisher | University of Waterloo | |
| dc.relation.ispartofseries | Computer Science Technical Reports; CS-94-10 | |
| dc.title | Parallel program and asynchronous circuit design | |
| dc.type | Technical Report | |
| uws.contributor.affiliation1 | Faculty of Mathematics | |
| uws.contributor.affiliation2 | David R. Cheriton School of Computer Science | |
| uws.peerReviewStatus | Unreviewed | |
| uws.scholarLevel | Faculty | |
| uws.typeOfResource | Text | en |