FPGA-Accelerated Deep Learning for Denoising Low-Dose PET Scans
dc.contributor.author | Dao, Eric-Khang Tan | |
dc.date.accessioned | 2025-04-17T17:38:05Z | |
dc.date.available | 2025-04-17T17:38:05Z | |
dc.date.issued | 2025-04-17 | |
dc.date.submitted | 2025-04-14 | |
dc.description.abstract | Positron Emission Tomography (PET) is an essential imaging technique used in clinical settings for diagnosing conditions such as cancer and neurological disorders; however, its dependence on radiopharmaceuticals poses potential radiation exposure risks. Lowering the administered dose can help improve patient safety but results in imagery with reduced Signal-to-Noise Ratio (SNR), impacting diagnostic accuracy. The trade-off between minimizing radiation exposure and maintaining image quality remains a key challenge in PET imaging. Recently, deep learning-based denoising techniques, such as Denoising Convolutional Neural Network (DnCNN), have proven effective in restoring noisy images to standard quality. Traditional implementations relying on CPUs and GPUs are often constrained by high power consumption and hardware overhead, limiting feasibility in edge-compute applications. To address these challenges, this thesis explores FPGA-based acceleration for PET image denoising. A dataset is constructed using PET scans from 10 Alzheimer’s disease patients from the ADNI database, with only 0.5% of the original radiotracer dose used. A software-based implementation is developed using a proposed U-Net-like architecture, then ported to an FPGA using OpenVINO and Intel’s FPGA AI Suite for hardware emulation. Experimental results show the FPGA implementation offers a 77% improvement in performance-to-watt ratio compared to the GPU-based solution, and a 2x reduction in latency compared to the CPU-based solution. | |
dc.identifier.uri | https://hdl.handle.net/10012/21603 | |
dc.language.iso | en | |
dc.pending | false | |
dc.publisher | University of Waterloo | en |
dc.subject | positron emission tomography | |
dc.subject | fpga | |
dc.subject | image denoising | |
dc.subject | deep learning | |
dc.subject | low-power | |
dc.title | FPGA-Accelerated Deep Learning for Denoising Low-Dose PET Scans | |
dc.type | Master Thesis | |
uws-etd.degree | Master of Applied Science | |
uws-etd.degree.department | Electrical and Computer Engineering | |
uws-etd.degree.discipline | Electrical and Computer Engineering | |
uws-etd.degree.grantor | University of Waterloo | en |
uws-etd.embargo.terms | 0 | |
uws.contributor.advisor | Gaudet, Vincent | |
uws.contributor.affiliation1 | Faculty of Engineering | |
uws.peerReviewStatus | Unreviewed | en |
uws.published.city | Waterloo | en |
uws.published.country | Canada | en |
uws.published.province | Ontario | en |
uws.scholarLevel | Graduate | en |
uws.typeOfResource | Text | en |